Researchers in South Korea have developed Aldebaran5, a processor for self-driving cars that provides high computing power as well as safety mechanisms to ensure reliability for automotive applications while exhibiting industry leading power efficiency in a tiny, smaller-than-a-nail-head size.

The Processor Research group at the Electronics and Telecommunications Research Institute (ETRI) in South Korea announced the successful development of Aldebaran5, a processor for self-driving cars. Aldebaran5 features 9 cores to provide high computing power as well as safety mechanisms to ensure reliability for automotive applications while exhibiting industry leading power efficiency (~1 watt) and a tiny form factor (smaller than the size of a nail head.) 

Codenamed Aldebaran5 after the brightest star in the constellation of Taurus, the chip is a significantly upgraded version of its predecessor. Nine cores provide ample computing power, 4 of which are dynamically programmable to operate for performance or for reliability. Safety features adhering to international standards ensure reliability with 99% detection coverage of faults and malfunctions and includes recovery mechanisms to mitigate potential negative effects. 

Furthermore, dedicated custom-designed acceleration circuitry for image recognition and HEVC (high efficiency video coding), as well as CAN bus communication hardware and an image signal processor (ISP) are integrated into the SoC, all combining to provide a robust and streamlined computing platform designed for autonomous vehicle applications. 

A wide range of applications have been demonstrated on Aldebaran5 attesting to a powerful, efficient, robust, yet reliable computing platform tailor-made for autonomous vehicle applications. These include real time pedestrian and vehicle recognition, lane detection/warning/keeping system, ultra high definition black box functionality (dash cam), interfacing and processing of various sensor data (radar, GPS, etc), vehicle maneuvering via CAN bus control, etc. 

Research and development to integrate neural network acceleration hardware in order to provide artificial intelligence capabilities are near completion and expected to be announced within the year.